Semiconductors traditionally use trench isolation structures to electrically isolate transistors and other devices as needed. The trench isolation is generally an electrical separation in a substrate that physically and electrically isolates one region of a semiconductor die from another. Conventional methods used to form electrical isolation of devices have been by techniques referred to as local oxidation of silicon (LOCOS) or shallow trench isolation (STI). The LOCOS process includes the formation of a masked area of an insulating oxide layer. The LOCOS process is therefore area dependent and not preferred as miniaturization of semiconductors continues. The STI process includes the formation of a trench that physically and electrically separates two semiconductor regions. The STI process is commonly used. A known disadvantage with the STI process is that the top corners of the trench can form an undesired electrical field concentration that negatively changes electrical parameters of the semiconductor. A known technique to reduce the electrical field variation at the corner of the trench is to round the top corners rather than to have sharp angled corners.
Known methods to form trenches with angled corners have various disadvantages. Such disadvantages include the requirement of additional processing steps, such as the formation of trench liners. Additionally, known trench methods have variability in the magnitude of the corner rounding due to liner thickness variations. At small processing dimensions such variations are critical.
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